1. Field of the Invention
This invention relates to data processing systems. More particularly, this invention relates to data processing systems which receive a plurality of signals from a plurality of different signal sources that must be prioritised.
2. Description of the Prior Art
An example of a data processing system receiving a plurality of signals that must be prioritised is the receipt of interrupt signals by a data processing system. Interrupt signals commonly result in the data processing system suspending execution of a current program and diverting to execute an interrupt routine to handle the received interrupt signal. It is possible, and in many cases probable, that more than one interrupt signal will be received at any given time. In this case, the highest priority interrupt that should be dealt with first must be identified from among the received interrupts.
An important performance parameter in many data processing systems is the interrupt latency. This can be thought of as the maximum time taken by the data processing system to respond to the given interrupt signal. In many data processing applications, it is important that the interrupt latency should be low. A further important factor is that the interrupt latency should be predictable. As an example, if the data processing system is part of a safety system operating in real time, such as a vehicle airbag system, then it is not sufficient that the data processing system should respond in good time to an interrupt to trigger deployment 99 times out of 100, rather the data processing system must provide an acceptable maximum interrupt latency in all circumstances.
The above requirements for a low and predictable interrupt latency are further complicated by a desire to be able to reorder the priority of the interrupt signals. If the priority of an interrupt signal is determined solely by the hardwired configuration of the data processing system, then this hardware configuration needs to be changed in order to change the interrupt priority, i.e. this arrangement may preclude the ability to dynamically change the interrupt priorities during different operational modes of a signal piece of hardware. Even when such dynamic alternation of the interrupt hardware is not required, a need to modify the hardware for different implementations to reflect their different interrupt priorities is a disadvantageous overhead in terms of design time and testing.
One aspect the present invention provides apparatus for processing data, said apparatus comprising:
(i) an signal receiving circuit coupled to a plurality of signal sources, said signal receiving circuit providing a signal status word, one or more bits of said signal status word indicating whether a respective signal source has asserted a signal; and
(ii) signal prioritising logic for reading said signal status word and identifying, using a branch search having a plurality of search levels, in accordance with a predetermined priority ordering, a highest priority signal source indicated by said signal status word as having asserted a signal; wherein
(iii) said signal prioritising logic searches said signal status word using one or more programmable mask words that are combined with said signal status word to generate a result indicative of said highest priority signal source; and
(iv) changing said one or more programmable mask words changes said predetermined priority ordering.
The invention recognises the above combination of problems and provides the solution of using programmable masks to search through a signal status word containing bits indicating whether respective signals have been asserted in order to identify the highest priority signal. Such a technique using programmable masks as part of a branch search has been found to provide a reduced maximum interrupt latency and to allow software programming of the mask words to change the priorities. The invention recognises that whilst such a programmable mask technique has the disadvantage over other software techniques of increasing the minimum response time for some signal sources, this is more than outweighed by the reduction in the maximum overall response time that is produced and the increased predictability of the response time.
In some embodiments of the invention a plurality of programmable masks may be associated with each search level and the mask used at each search level selected in dependence upon search results from one or more preceding search levels. This approach has the advantage that it is possible to arrange that when the bottom of the branch search has been reached, then the signal source will be directly identifiable from the results of the last comparison with a mask without requiring significant further processing or lookups.
An alternative approach used in different embodiments of the invention is one in which the programmable mask used at each search level is independent of the previous search results with the signal status word being modified at each search level in dependence upon the search results from the preceding search level. This approach reduces the number of masks required, which may mean that they can all be held in data processing registers, but has the disadvantage of requiring further processing after the last search level has been reached in order to identify the signal source.
Whilst it is appreciated that the invention may be used to prioritise signals from many different signal sources, it is particularly useful in circumstances where the signal sources are a plurality of interrupt signals.
In this case the signal prioritising circuit contributes to the interrupt latency time and reducing this in the context of an integrated circuit is particularly advantageous.
Whilst it will be appreciated that the signal prioritising logic could be embodied as hardware using programmable mask words, it is preferred that the signal prioritising logic comprises a data processor operating under program instruction control. In this way, a software routine can be made to identify the highest priority source in a highly flexible manner and using resources that are already present within the circuit.
A preferred way of increasing the performance of the signal prioritising logic subroutine is to store the programmable mask words in data processing registers prior to conducting ,the search as it is known that these programmable mask words will be needed and high speed access can be gained to them from the registers.
Viewed from another aspect the invention provides a method of processing data, said method comprising the steps of:
(i) generating a signal status word, one or more bits of said signal status word indicating whether a respective signal source has asserted a signal; and
(ii) reading said signal status word and identifying, using a branch search having a plurality of search levels, in accordance with a predetermined priority ordering, a highest priority signal source indicated by said signal status word as having asserted a signal; and
(iii) searching said signal status word using one or more programmable mask words that are combined with said signal status word to generate a result indicative of said highest priority signal source; wherein
(iv) changing said one or more programmable mask words changes said predetermined priority ordering.
The invention may also be provided in the form of a computer program held on a computer program product for controlling a general purpose processor to perform the techniques described above.
The above, and other objects, features and advantages of this invention will be apparent from the following detailed description of illustrative embodiments which is to be read in connection with the accompanying drawings.